1. Field of the Invention
The embodiments of the invention provide a method and apparatus to target pre-determined spatially varying voltage variation across the area of the VLSI power distribution system using frequency domain analysis.
2. Description of the Related Art
Power supply variations in application specific integrated circuits (ASICs) can cause significant issues if not addressed properly. As the technology is advancing, resolving these issues is not a one point process. These issues have to be addressed during the entire design cycle. At early stages of the design, there is a lot more flexibility to make changes to placement of circuit and as the placement matures, there is a need to estimate the number of decoupling capacitors (also referred to herein as “decaps”) needed. As placement changes, the decap numbers can also change. Hence these have to be estimated hand-in-hand ahead of time.
Placement of circuits in ASICs can be an iterative process; and, estimating decaps can further add to these iterations. Historically, estimation of decaps has been a lengthy iterative process with no scientific and engineering approach of calculating the right numbers. Currently, estimation of decaps uses guidelines or impedance matching techniques. Using guidelines involves no knowledge of a floorplan. This provides a switching activity that is based on stand alone calculations. Impedance matching techniques are iterative processes that need matured floorplan and timing data.